Audio Denoising Coprocessor Based on RISC-V Custom Instruction Set Extension

نویسندگان

چکیده

As a typical active noise control algorithm, Filtered-x Least Mean Square (FxLMS) is widely used in the field of audio denoising. In this study, an denoising coprocessor based on Retrenched Injunction System Computer-V (RISC-V), custom instruction set extension was designed and software hardware co-design adopted; traditional pure implementation, accelerator optimization design carried out, connected to RISC-V core form coprocessor. Meanwhile, corresponding instructions were designed, compiling environment established, library function acceleration established by embedded inline assembly. Finally, (ANC) system built tested Hbird E203-Core, test data collected through analyzer. The results showed that algorithm can be realized combining heterogeneous Chip (SoC) with accelerator, effect approximately 8 dB. number consumed testing for specific operations reduced 60%, operation significant.

برای دانلود باید عضویت طلایی داشته باشید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

The RISC - V Compressed Instruction Set Manual

Warning! This draft specification may change before being accepted as standard, so implementations made to this draft specification might not conform to the future standard.

متن کامل

Instruction Set Extension for Long Integer Modulo Arithmetic on RISC-Based Smart Cards

Modulo multiplication of long integers (≥ 1024 bits) is the major operation of many public-key cryptosystems like RSA or Diffie-Hellman. The efficient implementation of modulo arithmetic is a challenging task, in particular on smart cards due to their constrained resources and relatively slow clock frequency. In this paper we present the concept of an application-specific instruction set extens...

متن کامل

Automatically Generating Custom Instruction Set Extensions

General-purpose processors that are utilized as cores are often incapable of achieving the challenging cost, performance, and power demands of high-performance audio, video, and networking applications. To meet these demands, most systems employ a number of hardware accelerators to off-load the computationally demanding portions of the application. As an alternative to this strategy, we examine...

متن کامل

Instruction Set Extension Through Partial Customization Of Low-End Risc Processor

This paper covers the design technique of an enhanced Reduce Instruction Set Computer (RISC)-based processor core using application-specific instruction-set processor (ASIP) methodology. The processor core, called UTeMRISC03, is essentially a synthesizable processor written in Verilog HDL with a 16-bit data path and a 22-bit wide instruction. Using ASIP methodology, the processor architecture i...

متن کامل

Extension Error Set Based on Extension Set

This paper gives the concepts of extension error set and fuzzy extension error set, discusses diverse extension error set and fuzzy extension error set based on extension set and error set, and puts forward the relevant propositions and operations. Finally, it provides proofs of the soundness and completeness for the propositions and operations.

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

ژورنال

عنوان ژورنال: Acoustics

سال: 2022

ISSN: ['2624-599X']

DOI: https://doi.org/10.3390/acoustics4030033